High-level Design Development Department

System Level Design Group.
Semiconductor Technology Academic Research Center

High-level Design Development Department - Summary

This development department is involved with the research and development of high-level design methodologies, as well as design automation technologies for system, architecture and software levels, in order to improve the design efficiency and to optimize the design of the SoC, which is becoming increasingly larger in scale.

Current research and development

The department is proceeding with research and development with the aim to provide solutions for the issues relating to the existing high-level design of the SoC.Further, development of the “High-speed Coordinated Verification Technology for Hardware and Software” is being promoted as a new technology.
The coordinated verification technology that can be used to verify the overall system by bundling together both the software and hardware in a single unit, is becoming more and more important with the current System on Chip (SoC) designs.
Verification of the overall systems, however, has been difficult to realize with coordinated verifications based on the existing Instruction Set Simulator (ISS), as the verification speed is much too slow.
This development department is researching and developing high-speed coordinated verification technology, targeting 10M to 100M commands per minute, which is approximately one thousand times faster than the rate available with existing technologies. With this technology, it will be possible to see a vast improvement in the efficiency of the coordinated verification of hardware and software.
Development technology