Low Power Technology Group

Design Technology Development Dept.
Semiconductor Technology Academic Reserch Center

Japanese version is here.
Updated on Feb. 12, 2003
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-- Introduction to the Low Power Technology Group !! --

Along with the establishment of the digital society, low power technology is becoming　important not only to realize the battery-operated portable devices but also to solve the energy issue. Under this recognition, STARC has started the Low Power Technology Group on 2001 March. The mission of the group is to drastically decrease the power consumption of large scale system-on-chip (SoC) less than 1/200. 12 engineers joined the team from the client companies and a university. Although the field of low power technology is very wide, we are challenging to cover it and accelerating our research toward the world-wide leading edge. We have three groups inside, System Group, Analog Group, Memory Group.

Our goal

  1. 1/200 power consumption using 90nm CMOS technology
  2. Analog circuit operating below 1V supply voltage
  3. On chip memory operating at 0.5V power supply
  4. Design methodology of very low power SoC with integrating these technologies
(*)SoC：System on Chip

System control technique
  • Power control system
  • 0.5V operation technique
    (Supply Voltage, Back bias control)
  • Low power on-chip bus
On-chip memory
  • 0.5V operation low power on-chip memory
Analog technique
  • 1V operation lowpower ADC
    (Flash/pipeline)
  • Low power analog IP

Target application

development project
Circuit technology development (130nm) [2003/1Q]
Low power CPU core development (90nm) [2004/1Q]
Analog embedded low power SoC development (90nm) [2005/1Q]

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