IP Verification Platform


Overview


IP verification platform proposed here is a technology infrastructure facilitating pre-purchase-phase IP verification in the STARC recommended IP reuse flow. It has been developed to remove obstacles and to promote IP reuse. In this proposal, we also recommend Virtual Component Interface(VCI) and Open Core Protocol(OCP) as IP interconnect protocols to help SoC developers integrate these IPs independently of specific SoC bus specifications.


Activities


Already developed and experimentally proven IP verification platforms
(1) IP verification platform using hardware emulator RaveSim's RAVETM.
(2) IP verification platform using hardware emulator RaveSim's RAVETM and
Sonics's Silicon Backplane μNetworkTM.
(3) IP verification platform based on Oki Electronics's μPlatformTM.

IP verification platform in the experimental stage
(1) IP verification platform based on μT-Engine.

Topics

(Nov. 2002) ET2002(Embedded Technology 2002) 22-22 Nov. 2002
at Pacifico Yokohama, Panel exhibition.

(Jan. 2002) EDS2002(Electronic Design and Solution Fair) 24-25 Jan. 2002
at Pacifico Yokohama, Panel exhibition and demonstration.

(Jan. 2003) EDS2003(Electronic Design and Solution Fair) 30-31 Jan. 2003
at Pacifico Yokohama, Panel exhibition.

(Jan. 2004) EDS2004(Electronic Design and Solution Fair) 29-30 Jan. 2004
at Pacifico Yokohama, Panel exhibition.

Data

STARC recommended IP verification platform specification(Rev 2.0) (Pendency)



Copyright (C) 2002 Semiconductor Technology Academic Research Center(STARC)